My guess would be partially because there are fewer possible interfaces, and they’re directly connecting the CPU to a separate Ethernet/WiFi MAC, USB hub controller, and audio DSP rather than having a separate chipset arbitrating who’s talking to the CPU and doing some of those functions?
my understanding, from the block diagrams they release, is that these io functions are simply integrated into the cpu. in a way that could probably be implemented in desktops too.
The reason is flexibility, the board manufacturer can decide how many PCIe lanes to send where, how many USB ports there’s going to be etc. Modern mainboards are a power delivery system and IO backplane.
laptops all have pretty much an x86 soc. separation between cpu and chipset nowadays happens only on desktops for some reason.
I haven’t looked that closely at laptop CPUs
My guess would be partially because there are fewer possible interfaces, and they’re directly connecting the CPU to a separate Ethernet/WiFi MAC, USB hub controller, and audio DSP rather than having a separate chipset arbitrating who’s talking to the CPU and doing some of those functions?
my understanding, from the block diagrams they release, is that these io functions are simply integrated into the cpu. in a way that could probably be implemented in desktops too.
The reason is flexibility, the board manufacturer can decide how many PCIe lanes to send where, how many USB ports there’s going to be etc. Modern mainboards are a power delivery system and IO backplane.
this makes sense but can’t it be done with integrated chipsets too?